| 摘要 |
PURPOSE:To obtain a data buffer of high performance with simple control by providing two buffer memories and an access control register which stores one of both buffer memories to which data are written for each address so that both data writing and reading jobs are possible at one time. CONSTITUTION:When data are read out of buffer memories 2 and 3 via a buffer circuit, one of both memories 2 and 3 to which data are written is known with reference to an access control register 13. This information on said buffer memory is set at access control bit 14. Then data are read out of the memory 2 or 3 based on the value of the bit 14. When data are written into both memories at one time, the data are written into the memory 2 or 3 to which no reading instruction is given from the bit 14 and the corresponding bit of the register 13 is replaced. In such a way, both data writing and reading jobs can be carried out at one time.
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