| 摘要 |
<p>A digital satellite broadcasting receiver includes: a channel selecting circuit having a channel selecting PLL; a carrier recovery circuit receiving an output from the channel selecting circuit and having a carrier recovery PLL; a switching circuit for switching a loop bandwidth of the channel selecting PLL; and a control circuit for controlling the switching circuit such that the loop bandwidth of the channel selecting PLL circuit is made narrower than in a normal receiving state and than at a channel switching, at the time of centering. Instead of channel selecting PLL, the loop bandwidth of the carrier recovery PLL may be made wider temporarily. The method of centering in the receiver includes the following steps. Namely, the step (#8) of narrowing the loop bandwidth of the channel selecting PLL; the step (#10, #15) of changing a synchronizing frequency of the channel selecting PLL so as to minimize the amount of carrier offset obtained from the demodulated signal; and the step (#18) of widening the loop bandwidth of the channel selecting PLL. <IMAGE></p> |
