| 摘要 |
This Schottky barrier gate field effect transistor has N+-type source and drain regions formed in the surface area of a GaAs semi-insulation substrate, a channel region formed between the source and drain regions, and a gate electrode formed on this channel region. Particularly, in this Schottky barrier gate field effect transistor, the gate electrode has a first metal portion, which is preferably in Schottky contact with the channel region, and a second metal portion, which stably affixes to the first metal portion. The first and second metal portions are fixed to an insulative portion formed on the channel region.
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