发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To decrease the number of microprogram steps and to realize display even in a CPU clock by performing the display control of a CPU register with hardware. CONSTITUTION:When a display controller 20 receives a request for display of the register contents, a microinstruction controller 11 of a CPU10 receives the information on reception of said display request and delivers a microinstruction execution inhibiting signal 35 to inhibit the execution of a microinstruction and also to inform the register reading permission to the device 20. The controller 20 outputs a signal to a multiplexer 18 for selection a register 16 to which a display request is given and at the same time keeps a shift permitting signal 33 turned on for a period equal to the cycle number coincident with the bit numbers of various registers. The designated register 16 shifts synchronously with a clock for an ON period of the signal 33. This shift output is given to an input register 19 as the serial data and then converted into the parallel data via the multiplexer 18. Then this parallel data is displayed by a display control device 20.
申请公布号 JPS63208952(A) 申请公布日期 1988.08.30
申请号 JP19870041303 申请日期 1987.02.26
申请人 TOSHIBA CORP 发明人 FUKUDA MASAHARU
分类号 G06F11/28;G06F9/22 主分类号 G06F11/28
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