| 摘要 |
A graphics accelerator (91) responds to commands from a computer (86) in a graphic system by storing the definitions of non-uniform rational B-spline patches (12,13,14,15) and their associated trimming curves S1-S9). The graphics accelerator then produces device coordinates for trimmed polygons computed for each patch and sends these polygons to a display (94). Various improvements are incorporated to minimize the effects of roundoff error. The B-spline definitions of the trimming curves (27) in the uv parameter space of each patch are converted to approximating short straight line segments. Untrimmed polygon vertices, the end points of the straight line segments and the intersections of the straight line segments with subspan boundaries corresponding to polygon edges are kept in a data structure of linked lists of vertex tables (Fig 15). The data structure is traversed to determine new polygon vertices for trimmed polygons. The trimming mechanisms is compatible with recursive subdivision of patches to overcome practical limitations on the number of trimming curves that may be associated with each patch. The length of the straight line segments of the trimming curves is adjusted to compensate for less than ideal parameterization of the trimming curve functions. Associated with each trimming curve within a patch is information about the position of that trimming curve in the span. As each polygon for that patch is generated, those trimming curves that are clearly outside the clip limits for that polygon are excluded from consideration. This reduces the average number of trimming curves that must be processed for the patch, and increases the speed of the graphics accelerator. |
