| 摘要 |
PURPOSE:To eliminate any wasteful space for preventing the signal line length and the chip space from increasing by a method wherein a designed circuit is divided into one to several bit units to make automatic arrangement wiring so that said circuit may be designed by making several circuits subject to the automatic arrangement wiring. CONSTITUTION:A circuit is composed of a one bit X input registor 8, a one bit Y input registor 9, a one bit processor 10 and one bit output latch 11 to make out a logic connecting description so that an automatic arrangement wiring may be made by an electronic computer according to the connecting data. At this time, the blocks take a longitudinal shape to wire the data in the longitudinal direction while the control lines in the lateral direction. The control lines are led out to the right and left side symmetrical positions of blocks to be connected to one another only by forming the blocks repeatedly. The blocks thus designed are formed adjacently by the bit number (i.e., for 32 bits if the data processor is composed of 32 bits) to design the specified circuit (e.g. ALU). Through these procedures, any wasteful space can be eliminated to restrain the signal line length and the chip space from increasing. |
