| 摘要 |
PURPOSE:To observe the variation in circuit delay time in a chip by selecting the output signals of plural ring oscillator circuits which are arranged dispersedly in the chip or the output signal of a shift bus circuit in the chip according to a shift mode signal. CONSTITUTION:The ring oscillator circuits 1 and 2 are arranged dispersedly and equally in the chip 8. Then the output signals 106 and 107 of the circuits 1 and 2 of the shift-out signal 108 of a FF group 3 of shift bus constitution in the chip 8 is selected by a selecting circuit 7 according to the output signal 104 obtained by ANDing the shift mode signal 100, the NOT signal 103 of the signal, and a shift-in signal 102. Thus, the variance in circuit delay time in the chip 8 can be observed without increasing the number of terminals in use.
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