| 摘要 |
A charge detection circuit includes a p-type semiconductor substrate (11A), a reference voltage source (20) for generating a reference voltage having a predetermined voltage difference with respect to the potential of the semiconductor substrate (11A), a first n<+>-type semiconductor region (13) formed in the semiconductor substrate (11A), for storing a carrier packet, a second n<+>-type semiconductor region (14) formed in the semiconductor substrate (11A) and connected to the reference voltage source (20) so as to be kept at a potential substantially equal to the reference potential, an MIS type transfer gate (15, 18) having a channel (15A) formed between the first and second semiconductor regions (13 and 14), and a gate electrode (18) insulatively formed over the channel (15A) to transfer the carrier packet from the first semiconductor region (13) to the second semiconductor region (14), a potential detection circuit (17) for detecting the potential of the first semiconductor region (13), which potential is determined by the amount of carriers in the carrier packet, a signal supply section (19) for supplying a control potential signal to the gate electrode (18), to control the conduction state of the transfer gate (15, 18), and a biasing circuit for biasing the potential of the gate electrode (18) according to a preset offset potential. The biasing circuit (21) has a resistor of high resistance connected between the reference voltage source (20) and the gate electrode (18), to derive the preset offset potential from the reference potential.
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