| 摘要 |
PURPOSE:To realize a high-speed writing cycle by providing a register for the address, write data and control input of a RAM and producing a clock and a write pulse of the RAM from a common clock to supply them to the register. CONSTITUTION:The write pulse of a RAM 1 and the clock for an input register 2 of the RAM 1 are produced from the common external clock so that the prescribed timing relation and each necessary width are obtained. Chopper circuits 31 and 41 chop the common external clock pulses to arrange their rear edges and supply them to an expanding circuit 32 and the register 2. Thus the prescribed timing relation is secured between the write pulse and the latching clock of the register 2 via the common external clock. At the same time, the influence of the fluctuation of the pulse width of the external clock can be eliminated by producing a pulse of the desired width through the circuit 31. As a result, a writing cycle can be shortened.
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