发明名称 DIGITAL IMAGE DATA PROCESSOR
摘要 <p>PURPOSE:To scarcely deteriorate the quality of a picture by outputting an error flag when an error exceeding the correction capability occurrs, and using a delay means whose delay amount is integer-times of a horizontal scanning period. CONSTITUTION:When a PCM decoder circuit 32 is capable of error correction, switches 50, 54 are connected to N-contacting point, but if the quantity of errors exceeds the correction capable extent, they are connected to E-contacting point. In such a way, the decoder circuit 32 switches the switches 50, 54. It 32 also functions as a delay line provided with a delay amount equivalent to the share of one off two lines of recording image signals. If the error correction is no longer available, an error flag turnes on, and the switches 50, 54 turns to an E-connecting point. Then the output of a line memory 52 is supplied to a frame memory 36, and at the same time, an output signal from the line memory 52 supplied to its own input side through a switch 50 to circulate the signal.</p>
申请公布号 JPS63164687(A) 申请公布日期 1988.07.08
申请号 JP19860311676 申请日期 1986.12.26
申请人 CANON INC 发明人 NAKAYAMA TADAYOSHI;SATO TSUTOMU;FUJII AKIO;TAKAHASHI KOJI;YOSHIMURA KATSUJI
分类号 H04N1/41;H04B14/04;H04N5/92;H04N7/24;H04N19/00;H04N19/102;H04N19/157;H04N19/423;H04N19/59;H04N19/65;H04N19/67;H04N19/85;H04N19/895 主分类号 H04N1/41
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