| 摘要 |
PURPOSE:To reduce quantized noise by stopping the operation of an integrating circuit in the latter half period of a clock period at the time of changing the same signal continued by the prescribed number of times to a different signal. CONSTITUTION:If an analog input signal is high when a shift register 9 continuously stores digital signals outputted from an analog comparator 1, the integrating circuit 8 is allowed to execute integrating operation only in the first half period of a clock period and to stop its operation in the latter half period at the time of changing the same contents continued by the prescribed number of times. When the analog input signal is low, the integrating operation of the circuit 8 is stopped in the clock period at the time of frequently changing the 'H' and 'L' levels. Consequently, the integrating step size of the integrating circuit 8 can be always kept at a proper value in accordance with a difference signal between an input analog signal and analog feedback signal.
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