| 摘要 |
PURPOSE:To reduce load applied to a microcomputer, by holding the output of a selection means when the interruption signal of an output means is enabled, and supplying the output value of the selection means as the prescribed address of the microcomputer. CONSTITUTION:Assuming that interruption is generated at the D1 input of a selector 3, an interruption line to a mu-COM1 becomes active ((L) level) only when the value of a binary counter 7 of 5 bits is set at 10,000 (order of QA-QE). After that, the outputs QA-QE of the binary counter 7 are held. Next, the mu-COM1 identifies the interruption line, and goes to an operation to read out the data of a vector address where a jump address is stored. At this time, a tri-state buffer 8 is enabled, and reads out the outputs QA-QE of the binary counter as the data, and jumps to an address based on the data, then, an interruption processing is executed. In this way, it is possible to minimize the processing time of the mu-COM. |
