发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To easily and efficiently debug a program by allowing an information processor to execute a preliminarily set alternate instruction instead of an instruction if this instruction is a preliminarily set specific instruction. CONSTITUTION:The instruction code in an instruction register 1 and that of the conversion object stored in a register 2 for instruction to be converted are compared with each other by a comparing circuit 4; and if this comparison results in coincidence, a gate circuit 5 is set to the inhibiting state and a gate circuit 6 is set to the conductive state, and the instruction code stored in a conversion instruction group register 3 is inputted to an execution instruction register 7 and becomes an instruction code group to be actually executed. If the comparison does not result in coincidence, the gate circuit 6 is set to the inhibiting state and the gate circuit 5 is set to the conductive state, and the instruction code stored in the instruction register 1 is inputted to the execution instruction register 7 and becomes the instruction code to be actually executed. That is, the instruction code of the instruction to be converted is set to the register 2, and the instruction to be actually executed is substituted with the instruction code group set to the conversion instruction group register 3 at the time of executing said instruction code.
申请公布号 JPS63163543(A) 申请公布日期 1988.07.07
申请号 JP19860314764 申请日期 1986.12.25
申请人 NEC CORP 发明人 OKANO MASAKI
分类号 G06F11/28;G06F9/06 主分类号 G06F11/28
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