发明名称 SIMULATION PROCESSING SYSTEM
摘要 PURPOSE:To extremely shorten the processing time of real parts by dividing the columns of unfixed values of the time axial direction into groups. CONSTITUTION:The output of an actual logic circuit shows a column '0000' or '1111' to a column 'XXXX'. In this case, the column of the unfixed values of the time axial direction are divided into groups. Thus the trial frequency of 0/1 analysis is extremely reduced. In other words, the new logical value 'S' showing the logical value equal to the previous time point is supplied in case an event is transmitted to a real part. Then the value 'S' is recognized by the hardware that performs the 0/1 analysis. Thus the unfixed values 'X' can be divided into groups and therefore the simulation accuracy is extremely improved.
申请公布号 JPS63155335(A) 申请公布日期 1988.06.28
申请号 JP19860301305 申请日期 1986.12.19
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD 发明人 AMANO NOBUTAKA;OE KIMIO;KUBO TAKASHIGE
分类号 G06F11/25;G06F11/26;G06F17/50 主分类号 G06F11/25
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