发明名称 |
Switching plane redundancy |
摘要 |
A memory comprising apparatus for selecting redundant rows of memory cells wherein the addressing of a defective regular row of memory cells coupled to a first set of bit lines results in the selection of a redundant row of memory cells coupled to a second set of bit lines such that signal interference resulting from the simultaneous enablement of two word lines in the memory is avoided.
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申请公布号 |
US4754434(A) |
申请公布日期 |
1988.06.28 |
申请号 |
US19850770815 |
申请日期 |
1985.08.28 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
WANG, MOON-YEE;YU, JAMES;FANG, HONG-GEE |
分类号 |
G11C11/413;G11C29/00;G11C29/04;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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