| 摘要 |
PURPOSE:To transfer data at a high speed and with high stability by controlling the transfer of data as prescribed between a transfer register and a data register and eliminating the influences of the inter-device connection line length and the clock signal skews. CONSTITUTION:The transfer data on a transmission side device 1 and the synchronizing signal SS produced from the clock signal CLA of its own device are set at a transfer input register 21 and a latch 22 of a reception side device 2. The transfer of data is controlled between the register 21 and a data register 23 of the device 2 by the clock signal CLB of the device 2 and the output of the latch 22. Thus the limitation is avoided for the transmission cycle set by the clock signal skew between both devices 1 and 2 as well as the inter-device connection line length. As a result, data can be transferred between devices at a high speed and with high stability.
|
