| 摘要 |
PURPOSE:To easily obtain a minute pattern and, at the same time, to increase the integration density and the capacitance by forming a layer to store an electric signal by making use of an uneven part of the pattern by a method wherein, after a second pattern as a second layer has been formed at the side of a first pattern by a vertical etching process and the first pattern has been removed selectively, a dielectric layer is formed on the whole surface. CONSTITUTION:An SiO2 pattern and a poly-Si film 3 are formed on an-Si substrate 1; the poly-Si film 3 is removed by an etching method by keeping the part for a poly-Si sidewall 30 as it is. Then, an SiO2 film 4 is formed on the whole surface; after an SiO2 side wall 40 has been formed by an anisotropic etching method, a polySi film 5 is deposited and a poly-Si sidewall 50 is formed. After a desired number of poly-Si sidewalls and SiO2 sidewalls have been formed, the SiO2 side wall 40 is removed by fluoric acid or the like, and poly-Si sidewalls 30, 50 are formed. Then, a dielectric layer 6 for a capacitor is formed on the whole surface; an electrode 7 is then formed by using low-resistance n<+> poly-Si, a metal or the like. As another electrode is relation to the electrode 7 the sidewalls 30, 50 and the Si substrate 1 must be made to be low-resistant. As a method for this, the method to introduce an impurity such as P, As or the like into these is possible. |
