发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To make a level shift circuit needless and to reduce the number of elements by connecting logical operation circuits in a form where they have load resistances in common one another. CONSTITUTION:The plural logical operation circuits are connected in the form in which the load resistances R12, R22 and R32, etc., of the adjacent logical operation circuits are held in common. By giving the threshold voltage 19 of the logical operation circuit, the electric potential of the output terminal 15a and the threshold voltage at that time are compared by the transistors Q13 and Q14 and moreover by means of positive feedback action the state of the output terminal 15a instantaneously become 'L' and that of the output terminal 15b instantaneously become 'H', and the values are latched during a latch mode. Namely, in a following mode, the load resistances are held in common among the logical operation circuits which execute the logical operation to a differential amplifier which is a constitutional element so as to be made to actuate and in the latch mode the result obtained after the above-mentioned action can be kept in a stable condition without falling into an unstable condition by means of the positive feedback action.
申请公布号 JPS63136822(A) 申请公布日期 1988.06.09
申请号 JP19860285461 申请日期 1986.11.28
申请人 NEC CORP 发明人 SONE KAZUYA
分类号 H03K19/086;H03M1/34 主分类号 H03K19/086
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