发明名称 INFORMATION PROCESSOR
摘要 <p>PURPOSE:To accelerate processing speed, by constituting a device so that data transfer can be performed from a storage means to a pulse output means keeping the execution state of a program by a central processing unit, in a processor being formed by integrating components in a single board. CONSTITUTION:An execution part 100 reads out the program of a program storage area 230 until an I/O request signal line 315 becomes active ('1'), and stores it in an instruction register 108, and an execution control part 109 decodes and executes the content of the instruction register 108. Meanwhile, when the I/O request signal line 315 becomes active ('1'), an acknowledge signal 325 is set active ('1'), and instruction to output the processing code of a transfer processing to a peripheral bus 500 is issued to an I/O request processing code generation circuit 308. The execution control part 109 writes the processing code of the transfer processing directly on the instruction register 108, and executes the transfer processing to comparison registers 411 and 421 fro buffer memories 210 and 220 holding a program counter 101, a PSW102, and a universal register 103.</p>
申请公布号 JPS63118969(A) 申请公布日期 1988.05.23
申请号 JP19860265855 申请日期 1986.11.07
申请人 NEC CORP 发明人 ABE HIDEO;MAEHASHI YUKIO
分类号 G06F9/46;G06F9/48;G06F13/28;G06F15/78 主分类号 G06F9/46
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