| 摘要 |
PURPOSE:To widen the source voltage operating margin of a highly integrated MOSRAM by clamping the low level value of a voltage supplied to a source commonly connected to two P-ch MOSTs to a voltage value higher than O volt by a prescribed value. CONSTITUTION:MOSTs Q1-Q5 constitute an inversion circuit and when the source voltage VCC is raised and signal phiPS is changed from 'L' to H'', the MOST Q1 is turned off and the MOST Q3 is turned on and at that time, the MOST Q2 is turned on, so that the inverse of phiPS is changed from 'H' to 'L'. However, the MOST Q2 is turned off via the delay of the gate of one stage consisting of the MOSTs Q4, Q5 and the L'' level of the signal, the inverse of phiPS is clamped to VCC-5 ¦VTHN¦ according to the operation of pulling up MOSTs Q6-Q10. Herein, the ¦VTHN¦ is a threshold voltage of the pulling up MOST. Thereby, a charging voltage to a BIT line goes to VCC-6 ¦VTHN¦. If ¦VTHP¦, ¦VTHN¦=1V, the maximum value of the charging voltage of the BIT line is 6V. Since the charging potential of the BIT line is limited to a maximum 6V, the operation allowance of a storage device is enlarged.
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