发明名称 SENSE AMPLIFIER CIRCUIT
摘要 PURPOSE:To prevent the circuit from being affected by threshold voltage of an FET and to improve sesitivity by inserting a capacitive element between a drain and a source of each FET in cross connection. CONSTITUTION:A sense amplifier circuit 10 consists of static capacitance elements 16, 17 having larger capacitance than that of the static capacitor of nodes 3, 4 connected between each drain and source of the FETs11, 12 in cross connection via data lines 1 and 2 or the like, and FETs13-15 for controlling current or the like. A gate-source potential difference VSG of the FETs11,12 immediately before the start of the sense operation of the circuit 10 satisfies Equation I when the information in a memory cell 30 or the like is logical 1, and corresponds to twice the potential difference DELTAV between the data lines 1 and 2 and the sensitivity of the circuit 10 is improved. On the other hand, the discharge attended with the increase in the potential of a sense control signal line 7 is executed while a potential difference V(3)-V(4) between the nodes 3 and 4 satisfied Equation II, the variation in the threshold voltage of the FETs11, 12 is cancelled and the effect of variance is corrected. Furthermore, the above statement is applied similarly in case of information 0.
申请公布号 JPS59167896(A) 申请公布日期 1984.09.21
申请号 JP19830042688 申请日期 1983.03.15
申请人 TOSHIBA KK 发明人 UCHIDA YUKIMASA
分类号 G11C11/419;G11C11/34;G11C11/409 主分类号 G11C11/419
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