发明名称 SUBSCREEN SIGNAL STORAGE CIRCUIT FOR PIP TELEVISION RECEIVER
摘要 PURPOSE:To reduce the manufacture cost by writing a subscreen signal into a display field memory synchronously with a main screen signal so as to eliminate a buffer line memory and its control circuit required for time matching of the two screens. CONSTITUTION:A video signal of the subscreen inputted to an input terminal 5 is subject to digital conversion by an A/D converter 6, inputted to a latch circuit 7, where the signal is latched by a latch pulse LP introduced from a memory control circuit 9. A data of the latch circuit 7 is read and written in a field memory 10 and in this case, it is controlled that the data at the address N is written in the address N of the field memory 10 without fail. The subscreen data written in th field memory 10 is used synchronously with a master clock BS during a prescribed period within the image period of the main screen by the memory control circuit 9, decoded into an analog signal by a D/A converter 11 and applied to an image circuit.
申请公布号 JPS63111778(A) 申请公布日期 1988.05.17
申请号 JP19860257804 申请日期 1986.10.29
申请人 SANYO ELECTRIC CO LTD 发明人 EBARA MASAMI;KAWAKATSU TADAO;ONISHI YASUO
分类号 H04N5/265;H04N5/45 主分类号 H04N5/265
代理机构 代理人
主权项
地址