| 摘要 |
<p>PURPOSE:To write and read a data fetched from an arbitrary bit with simple constitution by supplying number of the shifts and an address location to a shifter part and an address part through a ROM, and controlling plural memories corresponding to the respective bits of a data. CONSTITUTION:Corresponding to a bit position signal 104 and a read/write control signal 102 respectively from terminals 14, 15, a shift number signal 204 and an address selection position signal 205 are respectively supplied to the shifter part 2 and the address part 3 respectively from the terminal groups 24, 15 of the ROM part 4. And, the shifter part 2 shifts a parallel bit data based on the signal 204 to generate a bit data signal 201 and writes this signal in memories of a memory group 5 corresponding to the respective bits in accordance with an address signal 203 based on the signal 205 from the address part 3. Thus written data, also, is read similarly; and thus the write and read of a data fetched from an arbitrary bit can be executed rapidly with simple constitution needing no processing by CPU.</p> |
