| 摘要 |
PURPOSE:To eliminate the consumption at a useless array field in terms of merely delaying a signal and to realize a complicated order circuit with less hardware by providing a flip flop dedicated to delaying a signal. CONSTITUTION:The titled array incorporates plural flip flops E1-EK which are driven by a signal in common and subordinately connected, and a logic circuit 3 which can specify logic with the aid of a program that uses input signals given from data input terminals A1-AK and an output signal from the last-staged flip flong among plural flip flops as an input. The output of the logic circuit 3 is connected to the first-staged flip flop among them. In the process to merely delay a signal, the consumption at a useless array field is eliminated, and less hardware can realize the complicated order circuit. |
