| 摘要 |
PURPOSE:To reduce the occupying area per cell of a nonvolatile RAM and to implement high integration density, by providing a double-gate structure having floating gates for the gates of two sets of inverters, and partially providing semi-insulating regions between the floating gates and control gates. CONSTITUTION:The gates of a P-channel transistor Q10 and an N-channel transistor Q12 are formed with one piece of continued polycrystalline silicon, and a floating gate FG1 is provided. The gates of a P-channel transistor Q11 and an N-channel transistor Q13 also become a floating gate FG2. On the surfaces of the floating gates FG1 and FG2, regions TN1 and TN2 of a relatively thick SiO2 film 10 and a relatively thin SiO2 film 11 are formed. Control gates CG1 and CG2 comprising polycrystalline silicon are formed thereon. Thus an area occupied by a static memory cell is reduced and high integration density is implanted. |
