CONSTITUTING METHOD FOR MULTI-VALUE LOGIC CIRCUIT BASED ON COMPLEMENTARY PATH GATE,申请号JP19860210423-传众专利搜索

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发明名称	CONSTITUTING METHOD FOR MULTI-VALUE LOGIC CIRCUIT BASED ON COMPLEMENTARY PATH GATE
摘要
申请公布号	JPS6365716(A)	申请公布日期	1988.03.24
申请号	JP19860210423	申请日期	1986.09.05
申请人	HORIE KAZUHIRO	发明人	HORIE KAZUHIRO;KAMEYAMA MITSUTAKA;HIGUCHI TATSUO
分类号	H03K19/20	主分类号	H03K19/20
代理机构		代理人
主权项
地址

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