| 摘要 |
<p>PURPOSE:To contrive to improve the utilizing efficiency of a common memory in a packet switch by controlling number of times of write/read to/from the common memory in response to the speed of an input/output line through the use of a control memory. CONSTITUTION:In giving input information to an input line control section 1-i, the necessity of storage to a common memory field 3-j is discriminated and a common memory field number is written and displayed in a memory 4 by number of times s/v(where S is a cyclic speed to the common memory and (v) is the speed through the input line 11-i) only when the storage is allowed. Addresses, from O to P of the memory 4 are designated in order at the speed (s) and the information is written, in the memory field 3-j. After all the input information is written, the common memory field number is written while being read and displayed from the memory at an equal interval by number of times of s/v(where (v) is the speed in the output line 12-k and (s) is the cyclic speed of the memory 4). Then addresses, from O to P of the memory 4 are designated in order at the speed (s) and the data is sent to the line 12-k from the memory field 3-j.</p> |
