发明名称 PULL IN SYSTEM BY PLL
摘要 PURPOSE:To improve the pull in time at out of synchronism by inserting an amplifier with exponential characteristic between an output of a phase detector and a control input of a voltage controlled oscillator so as to improve the frequency stability at the steady-state. CONSTITUTION:A log amplifier 5 gives an exponential characteristic to an output of a phase detector 3 and gives the result to a voltage controlled oscillator 1. Thus, the oscillated frequency of the voltage controlled oscillator 1 changes exponentially to a phase detection output. Thus, even if the time constant of a low pass filter rectifying the output of the phase detector 3 is decreased, since the change in the oscillation frequency with respect to the change in the control voltage at the steady-state is less, the instable oscillated frequency is prevented. On the other hand, in case of out of synchronization, the change in the oscillation frequency is large and a sufficiently large control voltage is produced, the tracking speed, that is, the pull in time characteristic is improved.
申请公布号 JPS6356018(A) 申请公布日期 1988.03.10
申请号 JP19860199759 申请日期 1986.08.26
申请人 FUJITSU LTD 发明人 SAKAMOTO HIROSHI
分类号 H03L7/093;H03L7/08;H04L7/033 主分类号 H03L7/093
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