发明名称 OPERATION TESTING CIRCUIT
摘要 PURPOSE:To easily execute an operation test of an error processing circuit by providing a logic circuit for taking logic of a signal generated from an error detecting circuit, and a signal generated from a pseudo error generating part, and outputting its result to the error processing circuit. CONSTITUTION:In case of executing an operation test of an error processing circuit 2, a pseudo error generating part 1A is operated from the outside by using a shift path, and from the generating part 1A, a pseudo error generating signal 6, namely, a level signal of '1' is outputted. When this signal 6 is outputted, a logic circuit 1B consisting of an OR circuit outputs the '1' level signal being its OR to the circuit 2, irrespective of an error generating signal 4 outputted from an error detecting circuit 1. In this case, the circuit 2 executes a prescribed processing, based on the '1' level signal being the signal 6. As a result, an operation test of the circuit 2 can be executed.
申请公布号 JPS6355477(A) 申请公布日期 1988.03.09
申请号 JP19860199309 申请日期 1986.08.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 KOYAMA SHINGO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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