发明名称 ARITHMETIC PROCESSING UNIT
摘要 PURPOSE:To allow each software to select the execution of the same processing routine at the time of starting a software interruption processing routine by controlling the execution of each software interruption processing based on a condition code stored in a register. CONSTITUTION:A general register array 1 has a condition code register 1a for holding a condition code suppressing the execution of the same processing routine of each software interruption processing after the end of the execution of the same processing routine. A software interruption control circuit 10 operates a vector table address in accordance with the operand of an operation code of an instruction outputted from an instruction decoder 8 and written in a memory 4 and transfers its processing to a software interruption routine. in addition, the circuit 10 controls the execution of each software interruption processing based on the condition code stored in the register 1a.
申请公布号 JPS6349941(A) 申请公布日期 1988.03.02
申请号 JP19860192754 申请日期 1986.08.20
申请人 CANON INC 发明人 TAMURA NOBORU
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
代理机构 代理人
主权项
地址