| 摘要 |
A data process system incorporating a controlling processor (12) together with plural devices (2, 4, 6, 8, 10) intercommunicating via shared memory 16, such intercommunication being independent of but initialized by the controlling processor, wherein intercommunication control is exercised by the combination of
(a) a pointer table 20, the pointers in which are set by the controlling processor, are addressable by the devices and are indexed routinely in use,
(b) table entry identifier initialization in the devices by the controlling processor,
(c) control code (A CODE; P CODE) exchange between intercommunicating devices, independently of the shared memory, enabling access to the pointer table, and
(d) the pointers, as accessed, providing selective access to the shared memory. |
