发明名称 SIGNAL LINE DRIVING CIRCUIT
摘要 <p>PURPOSE:To easily separate a circuit required for read, and a circuit required for write, and to contrive fast readout, and power saving, by disconnecting a current path from a write power source voltage, to a read power source voltage, by an IGFET at time of reading. CONSTITUTION:A write voltage +25V is applied on an insulated gate type filed effect transistor (IGFET)M11, and a write signal PG becomes a logic 0, but an IGFET M8 goes to an ON state when the potential of an output point 2 is a logic 0, because the IGFET M8 is the one of depletion type, and the potential of a word line WL goes to the earth potential same as that of the output point 2. The potential of an output point 1 goes to the logic 0 only when both two address input signals A1 and A2 are logic 0s, and an IGFET M5 is turned ON, and an IGFET M6 is turned OFF, and the potential of the word line WL is decided by the input state of the address input signal A3. When the address input signal A3 is the logic 1, an IGFET M7 is turned OFF, and the potential of the output point 2 goes to the logic 1 that is the same potential as that of the address input signal A3, that is the potential of a power source Vcc.</p>
申请公布号 JPS6323297(A) 申请公布日期 1988.01.30
申请号 JP19870119737 申请日期 1987.05.15
申请人 NEC CORP 发明人 WATANABE TAKESHI
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
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