A planarization process for double metal mos using spin-on glass as a sacrificial layer.

摘要

A method of providing a planar or iso-planar surface to the interlevel dielectric layer between metal layers of a multilevel MOS wafer includes applying a first dielectric (22) over the first metal layer (20), applying a layer of spin-on glass (24) over the first dielectric layer, etching the spin-on glass layer in an etch process in which the rate of etch of the spin-on glass is approximately the same as the rate of etch of the first dielectric to reveal at least a portion of the first dielectric layer (22). A second dielectric layer (26) is placed over the surface of the first dielectric. Via (28) may then be defined through the dielectric layers (22, 26), and the second metal layer may be applied over the relatively smooth surface of the second dielectric layer.