发明名称 Apparatus and method for interprocessor communication.
摘要 <p>In order to provide communication between two processors in a data processing unit, a target processor includes apparatus that can store data signal groups from a source processor. Having stored a data signal group from the source processor, the target processor notifies the source processor of the receipt of the data signal group. In response to the presence of the stored data signal group, the target processor executes a command identified by the transferred data signal group. The source processor at a preselected time, executes an instruction to determine if the command designated by the data signal group stored in the target processor has been executed. The commands specified by the transferred data signal groups can be executed under hardware control by the target processor in a relatively short time immediately following completion of the instruction in execution in the target processor at the time of the transfer of the data signal group. The interprocessor communication has only a minor impact on the performance of the source processor and the target processor because of the command implementation by apparatus.</p>
申请公布号 EP0247604(A2) 申请公布日期 1987.12.02
申请号 EP19870107744 申请日期 1987.05.27
申请人 HONEYWELL BULL INC. 发明人 MORGANTI, VICTOR M.;PRANGE, PATRICK E.;GEYER, JAMES B.;BARLOW, GEORGE J.
分类号 G06F15/167;G06F15/17;(IPC1-7):G06F15/16 主分类号 G06F15/167
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