| 摘要 |
<p>PURPOSE:To reduce a time necessary for recording to about 1/2 a conventional one, by forming the OR signal of one line from the recording signals of two lines lacking sequence to record the same. CONSTITUTION:After recording signals of an n-th line and an (n+1)-th line lacking sequence are respectively transmitted to a first line buffer 2 and a second line buffer 3, CPU12 selects the channel 2 of a DMA controller 4. The DMA controller 4 outputs a signal from a DACK terminal 2 and simultaneously reads the recording signals of the n-th line and the (n+1)-th line lacking sequence from the first line buffer 2 and the second line buffer 3. These read recording signals are given to an OR gate to form the OR signal of one line from the recording signals of two lines and said OR signal is transmitted to the shift register 7 of a recording head 6.</p> |
