| 摘要 |
PURPOSE:To attain the discrimination of abnormality between a clock signal and abnormality detecting circuit by using the AND arithmetic result between the output of a detecting circuit for clock signal abnormality and the output of a watchdog timer which detects the abnormality of a microprocessor to decide the abnormality of the clock signal. CONSTITUTION:The abnormality of a clock signal is naturally detected by a clock signal abnormality detecting circuit 6 and a microprocessor 3 is unable to execute data processing due to the clock signal abnormality. A watchdog timer 7 detects the abnormality of the processor 3 and therefore and AND circuit 11 detects the clock abnormality to display it on a display device 8. In case a clock abnormality signal is outputted owing to the abnormality of the circuit 6 itself even through the clock signal outputted from a clock oscillating circuit 2 is normal, the processor 3 is carrying out the normal data processing. Thus the abnormality can be decided even with the cock abnormality signal inputted via an abnormality data input circuit 10. Thus it is possible to decide easily the abnormality of the circuit 6 itself.
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