| 摘要 |
PURPOSE:To confirm the normality of the hardwares with the data processing device only by making buffer memories for transmission and reception readable and writable from the said processing device and the interface device. CONSTITUTION:The interface device 31 is comprised of a reception buffer memory 4001, a control part 401, an address register 4020 for transmission buffer memory, and an address register 4021 for reception buffer memory. The control part 401 employs a microprogram control, and its comprised of a control memory 4010 for microprogram, and a microprogram instruction register 4011 and the like. In case data is transferred between data processing devices, either of the buffer memories is used for transmission, and the other is used for reception. In case no data is transferred the data in one of the buffer memories is transferred to the other in accordance with the microprogram in order to execute the confirmation of the normality.
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