发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the integration of a semiconductor integrated logic circuit device by forming a lower diffused layer after the lower diffused layer is raised by more than half of the thickness of an epitaxial layer to be diffused, then forming an upper diffused layer to form the upper diffused layer in a shallow depth, thereby suppressing the lateral diffusion. CONSTITUTION:A lower diffused layer 4 of upper and lower separating region 3 and a collector buried layer 5 are raised by more than half of the thickness of an epitaxial layer 6 to be diffused, a base region 7 is simultaneously formed to arrive at the layer 5 or substantially arrive thereat, then an upper diffused layer 8 of the region 3 and a collector leading region 9 are so diffused at to arrive at the layers 4 and 5. Since the layer 8 is formed after the layers 4, 5, and the region 7 are sufficiently deeply driven in, the layer 8 can be formed in a shallow depth to suppress the lateral diffusion. Thus, the integration can be largely improved without deteriorating the characteristics of vertical PNP transistor.
申请公布号 JPS62216356(A) 申请公布日期 1987.09.22
申请号 JP19860060015 申请日期 1986.03.18
申请人 SANYO ELECTRIC CO LTD 发明人 TABATA TERUO
分类号 H01L27/082;H01L21/8224;H01L21/8228 主分类号 H01L27/082
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