| 摘要 |
PURPOSE:To attain the read/write of two data of two consecutive addresses by providing a storage area being the collection of storage circuit groups and a decoder circuit accessing simultaneously one or two storage circuit groups. CONSTITUTION:One of output terminals T1-Tn is selected by input signals I1-Il in an address decoder circuit 1. When the k-th output terminal Tk is selected, one or two of word lines W(2k-1), W2k, W(2k+1) are made active via a selector circuit Sk connected to the terminal Tk. This state is controlled by a control circuit 3. When a signal is at L, an optional address is accessed and when H, optional adjacent two addresses are accessed at the same time. Since the two addresses accessed at the same time have odd and even order addresses without fail, the two storage cell groups M accessed simultaneously are read or written at the same time.
|
