| 摘要 |
PURPOSE:To attain the transparent transmission to an input/output data of a bit buffer circuit by sending an input/output data of the bit buffer circuit in a transparent way even when a reception clock from a MODEM is in the mark hold state. CONSTITUTION:A control signal (a) of a MODEM 11 is inputted to a selection circuit 16 of a time division multiplexer 14 as a selection signal, the selection circuit 16 selects the position of a reception clock (c) when the control signal (a) is set and selects the position of a read clock (d) when reset and the selected clock is a write clock (f) of a bit fuffer circuit 15. When the control signal (a) of the MODEM 11 is set, a WRITE section of the bit buffer circuit 15 writes a random reception data (b) by using the reception clock (c), a READ section reads a data by using a read clock (d) and outputs a random read data (e). When reset, the reception data (b) of the mark hold state is written by using a read clock (d) of the time division multiplexer 14, the data is read by using the read clock (d) to output the read data (e) in the mark holding state.
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