| 摘要 |
<p>PURPOSE:To protect program data by inhibiting the increment operation of a program counter when the program data are specific (e.g. '0') at the time of reading the program data written in an EPROM to the external. CONSTITUTION:In case an external reading signal 10 is '0', an internal clock inhibition signal 9 for an optional address signal is turned to '0', a data output signal of the EPROM 3 is read out and a CPU starts to operate, but the data output of the EPROM 3 is not read out to the external. When the external reading signal 10 is '1', outputs of all address signal lines 8 are turned to '0' and output of all data output signal lines 1 are '0', data '1' is inputted to an internal clock inhibition signal generating circuit 14 and the signal 9 is turned to '1', so that an internal clock inhibition signal 6 is inhibited, the increment operation of the program counter 7 is stopped and the reading operation of the EPROM 3 is also stopped.</p> |
