发明名称 MEMORY CIRCUIT CONTROLLER
摘要 PURPOSE:To control a memory circuit with simple constitution and a clear logic by connecting one of output lines in a selector group and (Nm-1) unused high-order address lines out of address lines to an input, and providing the m-th selector group having 2N<m> lines of output lines. CONSTITUTION:The output Y of a selector 1 is used as an input to a selector 2,and is used as a control line for a ROM area, and addresses 0-1FFF are used when a CPU reads out a program data from the ROM area. At such a time, assuming that an area can be constituted with five kinds of ROMs as the ROM area, and four ROMs of No.5 having 2,048 words X 8 bits are used, address lines ADB11 and ADB12 other than the output Y0 of the selector are required for the designation of addresses 0-1FFF, and these three lines are provided as the input to the selector 2. Next, assuming that an access memory of No.4 having 8,192 words X 8 bits is used as a RAM area, the outputs of Y1-Y3 in the selector 1 can be used as the control line. In this way, the control part of the memory circuit can be constituted easily, and universality is heightened.
申请公布号 JPS62172450(A) 申请公布日期 1987.07.29
申请号 JP19860013444 申请日期 1986.01.24
申请人 NEC CORP 发明人 TAKANO KENICHI
分类号 G06F12/02;G06F12/06 主分类号 G06F12/02
代理机构 代理人
主权项
地址
您可能感兴趣的专利