发明名称 INTERMITTENCE CONTROL SYSTEM FOR SIGNAL TONE
摘要 PURPOSE:To simplify a circuit constitution and to easily change intermittence patterns of a signal tone only by replacing a read-only memory (ROM) by performing intermittence control over the signal tone with a stored data pattern by applying the ROM. CONSTITUTION:An address counter circuit V performs counting operation with a 240 interlock signal (0.125sec period) from a signal line T1 and intermittence pattern data for intermitting the signal tone is inputted from the ROM I to relay driving transistors (TR) G0 and G1 of a signal trunk R through an output data buffer P successively. When the output of the 2<0> bit of the ROM is at an H level, a relay A is driven through the output data buffer P and TR G0 and the signal tone of a signal tone generator C is sent out to speech lines E1 and E2 through the making operation of a contact (a). When the output of the 2<0> is at an L level, the relay A is not driven and no signal tone is sent out. When data shown in a figure is stored in the 2<0> bit of the memory I, the signal tone is intermitted according to a waveform L0 and sent out to the talking lines E1 and E2.
申请公布号 JPS62171370(A) 申请公布日期 1987.07.28
申请号 JP19860013425 申请日期 1986.01.24
申请人 NEC CORP 发明人 FUKUSHIMA MASAHARU
分类号 H04M19/02 主分类号 H04M19/02
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