| 摘要 |
PURPOSE:To allow a Wallace tree circuit to operate fast by using a signal which has passed through less gates between the carry signal and sum signal of a full adder as the input to the full-adder of the next stage. CONSTITUTION:In the Wallace tree circuit, the sum output S of the full-adder FA of the 2nd stage is inputted to the FA of the 3rd stage and the output S of the 3rd stage is inputted to the FA of the 4th stage. The outputs S of two FAs of the 1st stage are inputted to the FAs of the 3rd stage and the 4th stage. Namely, the FA of the 2nd stage input a direction input signal and the carry output C of the FA of the 1st stage as the previous digit. When FAs are composed of three-input NOR gate circuits, outputs C are two gates and outputs S are three gates, so the number of gates from the input of the FA of the 1st stage to the outputs S and C of the 4th stage is one less than that of a conventional example, so fast addition is enabled.
|
