发明名称 ANALOG DATA PROCESSOR DEVICE
摘要 PURPOSE:To quantize measured analog signals at high accuracy in a large range from low voltage level to high voltage level even when the width of variation of measured analog signals is large by controlling the amplification degree of an amplifier circuit automatically and making an input level to an A-D conversion circuit a value close to the optimum value. CONSTITUTION:The output of an amplifier circuit 2 is compared with a reference signal VR which is set to a value near the maximum voltage of measured analog signals by a comparator circuit 6. When the output is higher than the reference signal VR, the output of the comparator circuit 6 becomes high level, and applied to the gate circuit of a counter circuit 7. Gain clock pulse SC outputted from a controlling circuit 8 is passed, and counted by a counter 82 which was set to an initial value by a counter clear signal SR from the controlling circuit 8, and outputted as gain data DG. The gain data DG are sent to an I/O port 5 and held temporarily and, at the same time, sent to the amplifier circuit 2 and control the amplification degree until the output of the comparator circuit 6 becomes low level. At this time, the input level to an A-D conversion circuit 4 becomes a value close to the optimum value.
申请公布号 JPS62162133(A) 申请公布日期 1987.07.18
申请号 JP19860002934 申请日期 1986.01.10
申请人 NEC CORP 发明人 SHIRAI IKUO
分类号 G06F3/05;G01D5/249;H03M1/12 主分类号 G06F3/05
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