| 摘要 |
PURPOSE:To process a branch instruction at a high speed by correcting immediately the following wrong instruction prefetching action when the wrong branch information is detected. CONSTITUTION:The branch information is extracted out of a branch history table 410 when the address of anxinstruction different from a branch instruction is supplied to an instruction address register 411. If a branching address is set to the register 411 by the wrong branch information, an instruction decoding circuit 402 outputs the estimation failure signal to a signal line 121 through an operand address OA generating circuit stage estimation confirming circuit 424. An FF 436 receives said failure signal and is set at '1' and both FF 437 and 438 are set at '1' and '0' respectively in the next machine cycle. The FF 439 and 440 receive the contents of the FF 437 and 438 and are set at '1' and '0' respectively in the following machine cycle. An instruction prefetching control circuit 423 receives the contents of both FF 439 and 440 to replace the branch information stored in the table 410 and corrects the following wrong instruction prefetching action.
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