发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To reduce the monitoring load of a CPU and to attain the effective operation of the CPU by comparing a code produced by a terminal equipment with the code set by the CPU to transfer data and stop the transfer of data. CONSTITUTION:A terminal equipment 3 outputs a transfer stop code to a reception control circuit 11 of a control part 1 before an overflow of a memory occurs. The circuit 11 sends the received code to a comparator 15 and the comparator 15 compares this code with the transfer stop code set to a register 13. When the coincidence is obtained between both codes, a FF 16 is set to stop a transmission permitting signal. while a transmission control circuit 12 stops the transfer of the data received from a CPU 2 to the equipment 3. If a blank space is produced in the memory owing to the data processing of the equipment 3, a transfer start code is outputted to the circuit 11 and compared with the code set to the comparator 15. When coincidence is obtained between both codes, the FF 16 is reset and data are transferred.
申请公布号 JPS62152055(A) 申请公布日期 1987.07.07
申请号 JP19850292041 申请日期 1985.12.26
申请人 TOSHIBA CORP 发明人 HIRUMA AKIHIRO
分类号 G06F13/12 主分类号 G06F13/12
代理机构 代理人
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