发明名称 RESET SYSTEM FOR WATCHDOG TIMER FOR DEVICE USING MICROCOMPUTER
摘要 PURPOSE:To detect both faults with which the execution a main program and an interruption program are made impossible by separating an action to set the watchdog timer reset signal at a high level and an action to set said reset signal at a low level into the main and interruption programs respectively. CONSTITUTION:When an interruption program is used to perform an action to set the reset signal of a watchdog timer 3 at a high level, the watchdog timer reset signal is set at a low level by a main program. While the watchdog timer reset signal is set at a low level by an interruption program when the main program is used to set the watchdog timer reset signal at a high level. Thus it is possible to detect the fault of a circuit 2 which is controlled by a microcomputer 1 and a fault with which the execution of the interruption program or the main program is made impossible by a program runaway, etc.
申请公布号 JPS62147538(A) 申请公布日期 1987.07.01
申请号 JP19850288986 申请日期 1985.12.20
申请人 OKI ELECTRIC IND CO LTD 发明人 OSAKI KOSUKE
分类号 G06F11/30;G06F11/00 主分类号 G06F11/30
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