发明名称 DYNAMIC TYPE LOGIC CIRCUIT
摘要 PURPOSE:To obtain a circuit which can vary a circuit which depends on a time constant of capacitor, by adding a capacitor controlling circuit which can vary the capacity of the capacitor, to a dynamic logic circuit. CONSTITUTION:In a period tc, control signals (e), (f) in control signal lines 6a, 6b of waveforms as shown in figures (e), (f) are both 'L', and passing control gates 1-5a, 1-5b are both off, and capacitors 1-3, 1-4 are in a state that they are not connected to a signal line 1-1. Accordingly, an input signal (a) (figure a) in a signal input line 2 is outputted as it is an output signal (d) (figure d) in a signal output line 3 of a noise cancelling circuit 1. In periods ta1, tb1, the control signal (e) goes to 'H' as shown in the figure (e), one piece of passing control gates 1-5, namely, the passing control gate 1-5a is turned on and one capacitor 1-3 is connected to the signal line 1-1. In the period ta1, a pulse of the input signal (a) is applied to the signal input line 2, but it is cancelled by the capacitor 1-3 which is connected to the signal line 1-1.
申请公布号 JPS62140515(A) 申请公布日期 1987.06.24
申请号 JP19850282255 申请日期 1985.12.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 TATEISHI HIROSHI;HIGUCHI KEIZO
分类号 H03K19/096 主分类号 H03K19/096
代理机构 代理人
主权项
地址