| 摘要 |
PURPOSE:To shorten considerably the data transmission/reception time, to prevent external devices from waiting or prevent data from external equipments from being lost, by controlling transmission to and reception from external equipments by a slave microprocessor. CONSTITUTION:A slave microprocessor 2 receives transmission data, which a host microprocessor 1 stores in is shared RAM 6 through the first bus gate 21, through the second bus gate 22 and transmits this data to an external device through a transmission/reception interface 3. Reception data from the external equipment is received by the host microprocessor 1 in accordance with opposite procedures. Since data is transmitted and received by only memory transfer in this manner, the data transmission/reception time is shortened considerably, and the slave microprocessor 2 is prevented from being busy at another work to keep the external equipment waiting or losing data from the external equipment because the slave microprocessor 2 is used exclusively for data transmission and reception.
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